<div class="content-intro"><p><span class="acronym-highlight">OPSWAT</span>, a global leader in IT, <span class="acronym-highlight">OT</span>, and <span class="acronym-highlight">ICS</span> critical infrastructure cybersecurity, delivers an end-to-end platform that gives public and private sector organizations and enterprises the critical advantage needed to protect their complex networks, secure their devices, and ensure compliance. Over the last 20 years our commitment to innovative technology has earned the trust of more than 1,700 organizations, governments, and institutions globally, solidifying our role in protecting the world’s critical infrastructure and securing our way of life.</p></div><p><strong><span data-contrast="none">Role Summary</span></strong><span data-ccp-props="{"335559738":320,"335559739":120}"> </span></p>
<p><span data-contrast="none">MetaDefender NetWall is OPSWAT's hardware-enforced boundary between networks that must never be able to talk back — a combined hardware and software product deployed across critical infrastructure, defense, and government. This role builds the layer that makes that guarantee physical rather than declared: protocol termination, one-way transport, and content filtering enforced in FPGA (Field-Programmable Gate Array) silicon, at rates no general-purpose processor can sustain.</span><span data-ccp-props="{"335559738":70,"335559739":150}"> </span></p>
<p><span data-contrast="none">The Engineering Manager owns the FPGA discipline end to end — silicon and board selection, RTL (Register-Transfer Level) architecture, verification strategy, timing closure, toolchains, IP (Intellectual Property) licensing, the bring-up lab, and the team that does the work — and partners daily with software engineering, product, certification, QA (Quality Assurance), manufacturing, and supply chain. Success in the first twelve months means a working hardware datapath, a verified first protocol running in gateware, and an FPGA team that did not exist before — not the volume of RTL written.</span><span data-ccp-props="{"335559738":70,"335559739":150}"> </span></p>
<p><strong><span data-contrast="none">What Comes With the Role</span></strong><span data-ccp-props="{"335559738":320,"335559739":120}"> </span></p>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="1" data-aria-level="1"><span data-contrast="none">An installed base across energy, manufacturing, defense, government, transportation, and healthcare, already running on the NetWall unidirectional and bilateral security gateways</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="2" data-aria-level="1"><span data-contrast="none">An existing Common Criteria EAL4+ certification to extend rather than earn, and certified optical isolation hardware already in the product</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="3" data-aria-level="1"><span data-contrast="none">An R&D (Research and Development) organization of approximately 50 engineers, and the MetaDefender® platform — Multiscanning, Deep CDR™ Technology, Proactive DLP™ Technology, and policy enforcement — to build on rather than replicate</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="4" data-aria-level="1"><span data-contrast="none">A funded multi-year program to take the line to 100 Gbps and to NCDSMO (National Cross Domain Strategy and Management Office) Raise the Bar</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="5" data-aria-level="1"><span data-contrast="none">Budget and hiring authority to build the FPGA team from the first engineer, outside the standard requisition process</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<p><strong><span data-contrast="none">Key Responsibilities</span></strong><span data-ccp-props="{"335559738":320,"335559739":120}"> </span></p>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="6" data-aria-level="1"><span data-contrast="none">Own the FPGA discipline for the NetWall line — RTL architecture, verification strategy, timing closure, coding standards, IP selection, build and regression infrastructure, and the hiring and development of the engineers who do it</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="7" data-aria-level="1"><span data-contrast="none">Select the silicon and the boards — evaluate FPGA families and COTS (Commercial Off-The-Shelf) cards against sustained line rate, fabric and transceiver headroom, PCIe (Peripheral Component Interconnect Express) generation, optical cage compatibility, lead time, and licence cost — and own the vendor relationships that follow</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="8" data-aria-level="1"><span data-contrast="none">Build the one-way datapath in gateware — framing, link supervision, no back-channel, fail-closed behaviour on every error path, and re-assembly on the receiving side</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="9" data-aria-level="1"><span data-contrast="none">Move protocol termination into hardware — TCP (Transmission Control Protocol) state machines, and in time TLS (Transport Layer Security) termination and re-origination — terminating on the sending side and re-originating on the receiving side with no acknowledgement path across the boundary</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="10" data-aria-level="1"><span data-contrast="none">Own verification as a first-class deliverable — UVM (Universal Verification Methodology) environments, constrained-random regression, coverage closure, and formal proof of the properties certification depends on: always invoked, non-bypassable, fail-closed</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="11" data-aria-level="1"><span data-contrast="none">Deliver the design independence that certification requires — two filter implementations on two silicon lineages, two toolchains, two teams, one shared implementation-neutral specification, and the analysis that demonstrates no common-mode defect can exist</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="12" data-aria-level="1"><span data-contrast="none">Own the hardware and software interface with software engineering — PCIe endpoints, DMA (Direct Memory Access) engines, driver contracts, and the boundary decisions that determine what runs in gateware and what runs on the host</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="13" data-aria-level="1"><span data-contrast="none">Partner with certification on evidence as the design is built, not afterwards — design documentation, requirement traceability, and the authorship provenance a Common Criteria or NCDSMO assessment will ask for years after the code was written</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="14" data-aria-level="1"><span data-contrast="none">Work AI-natively with your team — use modern AI and agentic tools to explore architectures, generate and review testbenches, analyze waveforms and regression output, and accelerate verification, while holding provenance discipline on anything entering the certified boundary</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="15" data-aria-level="1"><span data-contrast="none">Own timing, area, power, and cost — close timing on large designs at line rate, and know the device, licence, and board cost your architecture commits the product to</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="16" data-aria-level="1"><span data-contrast="none">Own the bring-up lab — boards, optics, traffic generation, protocol analysis, and the test capability the program depends on</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="17" data-aria-level="1"><span data-contrast="none">Build and lead the team — recruit senior FPGA engineers in a scarce market, set the technical bar, and grow the discipline from the first hire to two independent implementation teams</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<p><strong><span data-contrast="none">Required Qualifications</span></strong><span data-ccp-props="{"335559738":320,"335559739":120}"> </span></p>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="18" data-aria-level="1"><span data-contrast="none">Five or more years in FPGA development, including production RTL in a shipping product and experience leading or managing FPGA engineers</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="19" data-aria-level="1"><span data-contrast="none">Deep SystemVerilog or VHDL, with genuine ownership of architecture, verification, and timing closure on large designs — not module-level contribution</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="20" data-aria-level="1"><span data-contrast="none">High-speed interface experience — multi-gigabit transceivers, Ethernet MAC (Media Access Control) and PCS (Physical Coding Sublayer), PCIe endpoints, and DMA</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="21" data-aria-level="1"><span data-contrast="none">Demonstrated protocol implementation in hardware — parsing, state machines, or offload — not only datapath or signal processing</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="22" data-aria-level="1"><span data-contrast="none">Verification depth: UVM, constrained-random and coverage-driven methodology, and exposure to formal property verification</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="23" data-aria-level="1"><span data-contrast="none">Fluent in at least one major toolchain — AMD Vivado or Altera Quartus Prime Pro — and able to stand up build and regression infrastructure from scratch</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="24" data-aria-level="1"><span data-contrast="none">Demonstrated AI-native working style, with concrete examples of using AI and agentic tools to design, verify, analyze, and document — an expectation of this role, not a nice-to-have</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="25" data-aria-level="1"><span data-contrast="none">Technical depth sufficient to hold meaningful conversations about Linux drivers, networking, security architecture, and system performance on either side of the hardware boundary</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="26" data-aria-level="1"><span data-contrast="none">US person — United States citizen or lawful permanent resident — and eligible for a security clearance</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="27" data-aria-level="1"><span data-contrast="none">Bias toward action — able to make good decisions without perfect information and keep the team moving</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="28" data-aria-level="1"><span data-contrast="none">Professional fluency in English</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<p><strong><span data-contrast="none">Nice-to-Have</span></strong><span data-ccp-props="{"335559738":320,"335559739":120}"> </span></p>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="29" data-aria-level="1"><span data-contrast="none">Cross-domain solutions, data diodes, guards, or other high-assurance security hardware</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="30" data-aria-level="1"><span data-contrast="none">Common Criteria, FIPS 140-3, or NCDSMO Raise the Bar experience as a technical contributor or owner</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="31" data-aria-level="1"><span data-contrast="none">Active US security clearance</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="32" data-aria-level="1"><span data-contrast="none">Formal verification of security properties, or design assurance in avionics, rail, or nuclear instrumentation</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="33" data-aria-level="1"><span data-contrast="none">100 Gbps networking, TCP offload, or TLS acceleration in hardware</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="34" data-aria-level="1"><span data-contrast="none">Experience across both AMD and Altera toolchains</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<ul>
<li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":431,"335559991":259,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="35" data-aria-level="1"><span data-contrast="none">Critical infrastructure, OT (Operational Technology), or industrial environments</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></li>
</ul>
<p> </p><div class="content-conclusion"><p>OPSWAT is an equal opportunity employer. We celebrate diversity and are committed to providing an environment where equal employment opportunities are extended to all employees and applicants, free of discrimination and harassment of any type. All employment decisions are based on individual qualifications, job requirements, and business needs without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sex